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Tech Discussion: ASIC, FPGA and IC Design >> Calibre

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pervanah
member

Reged: 05/20/10
Posts: 2
Loc: egypt

empty cells ??? help plz :)
#7195 - 06/21/10 05:12 PM (196.221.90.81)

hi

i wonder about a problem opening a layout in calibre DESIGNrev

when i open the layout , in the terminal it reports this message (for all cells in the layout).. an example of this message is as following :

WARNING: Cell CLKINVX1 is referenced but not defined. Empty cell used.

N.B. this is an ASIC design . and i use synopsys design compiler for synthesis and cadence first encounter for placement and rounting . calibre for verification .

can u plz explain for me this message ?

is this warning will affect my DRC , LVS and PEX run ?

thx very much

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kipiib89
member

Reged: 05/01/07
Posts: 13
Loc: Illinois/US

Re: empty cells ??? help plz :) [Re: pervanah]
#7198 - 06/22/10 09:49 PM (75.68.172.177)

I'm not sure about DesignRev but in Cadence it means that the reference to a particular cell no longer exists. For example, if a layout contained an instance that pointed to a particular cell in a particular library and then that cell or library was deleted then a warning would be generated. Ensure that all of the cells and/or libraries that are being referenced still exist and are defined.

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